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type ordering code package tle 4299 g q67006-a9417 p-dso-8-3 tle 4299 gm q67006-a9441 p-dso-14-8 5-v low drop fixed voltage regulator tle 4299 p-dso-8-3, -6, -7, -8, -9 p-dso-14-3, -8, -9, -11, 14 data sheet 1 rev. 1.1, 2004-01-01 features ? output voltage 5 v 2% 150 ma output current extreme low current consumption typical 65 a in on state inhibit function: below 1 a current consumption in off mode early warning reset output low down to v q = 1 v adjustable reset threshold overtemperature protection reverse polarity proof wide temperature range functional description the tle 4299 is a monolithic voltage regulator with fixed 5-v output, supplying loads up to 150 ma. it is especially designed for applications that may not be powered down while the motor is off. it only needs a quiescent current of typical 65 a. in addition the tle 4299 gm includes an inhibit function. when the inhibit signal is removed, the device is switched off and the quiescent current is less than 1 a. to achieve proper operation of the -controller, the device supplies a reset signal. the reset delay time is selected application-specific by an external delay capacitor. the reset threshold is adjustable. an early warning signal supervises the voltage at pin si. the tle 4299 is pin-compatible to the tle 4269 and functional similar with the additional inhibit function. the tle 4299 is designed to supply microcontroller systems even under automotive environment conditions. therefore it is protected against overload, short circuit and overtemperature.
data sheet 2 rev. 1.1, 2004-01-01 tle 4299 circuit description the tle 4299 is a pnp based very low drop linear voltage regular. it regulates the output voltage to v q = 5 v for an input voltage range of 5.5 v v i 45 v. the control circuit protects the device against potential caused by damages overcurrent and overtemperature. the internal control circuit achieves a 5 v output voltage with a tolerance of 2%. the device includes a power on reset and an under voltage reset function with adjustable reset delay time and adjustable reset switching threshold as well as a sense control/early warning function. the device includes an inhibit function to disable it when the ecu is not used for example while the motor is off. the reset logic compares the output voltage v q to an internal threshold. if the output voltage drops below this level, the external reset delay capacitor c d is discharged. when v d is lower than v ld , the reset output ro is switched low. if the output voltage drop is very short, the v ld level is not reached and no reset-signal is asserted. this feature avoids resets at short negative spikes at the output voltage e.g. caused by load changes. as soon as the output voltage is more positive than the reset threshold, the delay capacitor is charged with constant current. when the voltage reaches v ud the reset output ro is set high again. the reset threshold is either the internal defined v rt voltage (typical 4.6 v) or can be lowered by a voltage level at the radj input down to 3.5 v. the reset delay time and the reset reaction time are defined by the external capacitor c d . the reset function is active down to v i = 1 v. in addition to the normal reset function, the device gives an early warning. when the si voltage drops below v si,low , the devices asserts the si output low to indicate the logic and the -processor that this voltage has dropped. the sense function uses a hysteresis: when the si-voltage reaches the v si,high level, so is set high again. this feature can be used as early warning function to notice the -controller about a battery voltage drop and a possible reset in a short time. of cause also any other voltage can be observed by this feature. the user defines the threshold by the resistor-values r si1 and r si2 . for the exact timing and calculation of the reset and sense timing and thresholds, please refer to the application section.
tle 4299 data sheet 3 rev. 1.1, 2004-01-01 figure 1 block diagram tle 4299 g aeb03103 current and saturation control band- gap- reference reset control ro q i d reference si r so r ro so gnd radj
data sheet 4 rev. 1.1, 2004-01-01 tle 4299 figure 2 block diagram tle 4299 gm aeb03104 current and saturation control band- gap- reference tle 4299 reset control reference r so inhibit control r ro ro q i d si so gnd radj inh
tle 4299 data sheet 5 rev. 1.1, 2004-01-01 figure 3 pin configuration (top view) table 1 pin definitions and functions (tle 4299 g) pin no. symbol function 1i input; block directly to gnd on the ic with a ceramic capacitor. 2si sense input; if not needed connect to q. 3radj reset threshold; if not needed connect to gnd. 4d reset delay; to select delay time, connect to gnd via external capacitor. 5gnd ground 6ro reset output; the open-collector output is internally linked to q via a 20 k ? pull-up resistor. keep open, if the pin is not needed. 7so sense output; the open-collector output is internally linked to the output via a 20 k ? pull-up resistor. keep open, if the pin is not needed. 8q 5-v output; connect to gnd with a 22 f capacitor, esr < 5 ? . aep02832 8 1 i q si 2 7 radj 3 6 d4 5 so ro gnd p-dso-8-3
data sheet 6 rev. 1.1, 2004-01-01 tle 4299 figure 4 pin configuration (top view) table 2 pin definitions and functions (tle 4299 gm) pin no. symbol function 1radj reset threshold; if not needed connect to gnd. 2d reset delay; connect to gnd via external delay capacitor for setting delay time. 3, 4, 5 gnd ground 6inh inhibit; if not needed connect to input pin i; a high signal switches the regulator on. 7ro reset output; open-collector output, internally connected to q via a pull-up resistor of 20 k ? . keep open, if the pin is not needed. 8so sense output; open-collector output, internally connected to q via a 20 k ? pull-up resistor. keep open, if the pin is not needed. 9q 5-v output; connect to gnd with a 22 f capacitor, esr < 5 ? . 10, 11, 12 gnd ground 13 i input; block to gnd directly at the ic by a ceramic capacitor. 14 si sense input; if not needed connect to q. aep02831 14 1 radj si d2 13 gnd 3 12 gnd 4 11 10 gnd 5 69 inh ro 7 8 i gnd gnd gnd q so p-dso-14-8
tle 4299 data sheet 7 rev. 1.1, 2004-01-01 table 3 absolute maximum ratings t j = - 40 to 150 c parameter symbol limit values unit notes min. max. input i input voltage v i -40 45 v ? inhibit input inh input voltage v inh -40 45 v ? sense input si input voltage v si -0.3 45 v ? input current i si 11ma ? reset threshold radj voltage v re -0.3 7 v ? current i re -10 10 ma ? reset delay d voltage v d -0.3 7 v ? reset output ro voltage v r -0.3 7 v ? sense output so voltage v so -0.3 7 v ? 5-v output q output voltage v q -0.3 7 v ? output current i q -5 ? ma ? temperature junction temperature t j ? 150 c ? storage temperature t stg -50 150 c ? operating range input voltage v i 4.5 45 v ? junction temperature t j -40 150 c ?
data sheet 8 rev. 1.1, 2004-01-01 tle 4299 note: stresses above those listed here may cause permanent damage to the device. exposure to absolute maximum rating conditions for extended periods may affect device reliability. in the operating range, the functions given in the circuit description are fulfilled. thermal data junction-ambient r thja ? ? 200 70 k/w k/w p-dso-8-3 p-dso-14-8 junction-pin r thjp ? ? 60 30 k/w k/w p-dso-8-3 p-dso-14-8 1) 1) measured to pin 4. table 3 absolute maximum ratings (cont ? d) t j = - 40 to 150 c parameter symbol limit values unit notes min. max.
tle 4299 data sheet 9 rev. 1.1, 2004-01-01 table 4 characteristics v i = 13.5 v; t j = - 40 c < t j < 150 c parameter symbol limit values unit measuring condition min. typ. max. output voltage v q 4.90 5.00 5.10 v 1 ma i q 100 ma; 6 v v i 16 v output voltage v q 4.85 5.00 5.15 v i q 150 ma; 6 v v i 16 v current limit i q 250 400 500 ma ? current consumption; i q = i i - i q i q ? 65 105 a inhibit on; i q 1 ma, t j < 85 c current consumption; i q = i i - i q i q ? 65 100 a inhibit on; i q 1 ma, t j = 25 c current consumption; i q = i i - i q i q ? 170 500 a inhibit on; i q = 10 ma current consumption; i q = i i - i q i q ? 0.7 2 ma inhibit on; i q = 50 ma current consumption; i q = i i - i q i q ?? 1 a v inh = 0 v; t j = 25 c drop voltage v dr ? 0.22 0.5 v i q = 100 ma 1) load regulation ? v q ? 530mv i q = 1 ma to 100 ma line regulation ? v q ? 10 25 mv v i = 6 v to 28 v; i q = 1 ma power supply ripple rejection psrr ? 66 ? db f r = 100 hz; v r = 1 vpp; i q = 100 ma inhibit (tle 4299 gm only) inhibit off voltage range v inh off ?? 0.8 v tle 4299 gm; v q off inhibit on voltage range v inh on 3.5 ?? v tle 4299 gm; v q on high input current i inh on ? 35 a tle 4299 gm; v inh = 5 v low input current i inh off ? 0.5 2 a tle 4299 gm; v inh = 0 v
data sheet 10 rev. 1.1, 2004-01-01 tle 4299 reset generator switching threshold v rt 4.50 4.60 4.80 v ? reset pull-up r ro 10 20 40 k ? ? reset low voltage v r ? 0.17 0.40 v v q < 4.5 v; internal r ro ; i r = 1 ma external reset pull-up v r ext 5.6 ?? k ? pull-up resistor to q delay switching threshold v dt 1.5 1.85 2.2 v ? switching threshold v st 0.35 0.50 0.60 v ? reset delay low voltage v d ?? 0.1 v v q < v rt charge current i ch 4.0 8.0 12.0 a v d = 1 v reset delay time t d 17 28 35 ms c d = 100 nf reset reaction time t rr 0.5 1.2 3.0 s c d = 100 nf reset adjust switching threshold v radj th 1.26 1.36 1.44 v v q > 3.5 v input voltage sense sense threshold high v si high 1.34 1.45 1.54 v ? sense threshold low v si low 1.26 1.36 1.44 v ? sense input switching hysteresis v si hyst 50 90 130 mv v si hyst = v si high - v si low sense output low voltage v so low ? 0.1 0.4 v v si < 1.20 v; v i > 4.2 v; i so = 0 external so pull-up resistor r so ext 5.6 ?? k ? ? sense pull-up r so 10 20 40 k ? ? sense input current i si - 10.11 a ? sense high reaction time t pd so lh ? 2.4 2.9 s ? sense low reaction time t pd so hl ? 1.7 2.1 s ? 1) drop voltage = v i - v q (measured when the output voltage has dropped 100 mv from the nominal value obtained at 13.5 v input.) table 4 characteristics (cont ? d) v i = 13.5 v; t j = - 40 c < t j < 150 c parameter symbol limit values unit measuring condition min. typ. max.
tle 4299 data sheet 11 rev. 1.1, 2004-01-01 note: the listed characteristics are ensured over the operating range of the integrated circuit. typical characteristics specify mean values expected over the production spread. if not otherwise specified, typical characteristics apply at t a = 25 c and the given supply voltage. figure 5 measurement circuit aes02835 tle 4299 q1 gnd i d i c d 100 nf i d i i v i i q1 i gnd v q1 d v inh i inh inh v radj i radj radj i s i v si si so v so v ro ro (tle 4299 gm only)
data sheet 12 rev. 1.1, 2004-01-01 tle 4299 application information figure 6 application diagram tle 4299 g aes03105 current and saturation control band- gap- reference tle 4299 reset control ro q i d c i 1 v bat c d gnd r adj1 p r si1 r si2 reference si r so r ro r adj2 so radj c i 2 c q1 22 f c q2
tle 4299 data sheet 13 rev. 1.1, 2004-01-01 figure 7 application diagram with inhibit function the tle 4299 supplies a regulated 5 v output voltage with an accuracy of 2% from an input voltage between 5.5 v and 45 v in the temperature range of t j = -40 to 150 c. the device is capable to supply 150 ma. for protection at high input voltage above 25 v, the output current is reduced (soa protection). an input capacitor is necessary for compensating line influences and to limit steep input edges. a resistor of approx. 1 ? in series with c i , can damp the lc of the input inductivity and the input capacitor. the voltage regulator requires for stability an output capacitor c q of at least 22 f with an esr below 5 ? . aes03106 current and saturation control band- gap- reference tle 4299 reset control ro q i d c i 1 v bat c d gnd r adj1 p r si1 r si2 reference si r so r ro r adj2 so radj c i 2 inhibit logic inh from ki. 15 c q1 22 f c q2
data sheet 14 rev. 1.1, 2004-01-01 tle 4299 reset the power on reset feature is necessary for a defined start of the microprocessor when switching on the application. for the reset delay time after the output voltage of the regulator is above the reset threshold, the reset signal is set high again. the reset delay time is defined by the reset delay capacitor c d at pin d. the under-voltage reset circuitry supervises the output voltage. in case v q decreases below the reset threshold the reset output is set low after the reset reaction time. the reset low signal is generated down to an output voltage v q to 1 v. both the reset reaction time and the reset delay time is defined by the capacitor value. the power on reset delay time is defined by the charging time of an external delay capacitor c d . c d = ( t d i d ) / ? v (1) definitions: c d = reset delay capacitor t d = reset delay time ? v = v ud , typical 1.8 v for power up reset ? v = v ud - v ld , typical 1.35 v for undervoltage reset i d = charge current, typical 6.5 a for a delay capacitor c d = 100 nf the typical power on reset delay time is 28 ms. the reset reaction time t rr is the time it takes the voltage regulator to set reset output low after the output voltage has dropped below the reset threshold. it is typically 1 s for delay capacitor of 100 nf. for other values for c d the reaction time can be estimated using the following equation: t rr = 10 ns / nf c d (2)
tle 4299 data sheet 15 rev. 1.1, 2004-01-01 figure 8 reset timing diagram the reset output is an open collector output with a pull-up resistor of typical 20 k ? to q. an external pull-up can be added with a resistor value of at least 5.6 k ? . in addition the reset switching threshold can be adjusted by an external voltage divider. the feature is useful for microprocessors which guarantee safe operation down to voltages below the internally set reset threshold of 4.65 v typical. if the internal used reset threshold of typical 4.65 v is used, the pin radj has to be connected to gnd. if a lower reset threshold is required by the system, a voltage divider defines the reset threshold v rth between 3.5 v and 4.60 v: v rth = v radj th ( r adj1 + r adj2 ) / r adj2 (3) v radj th is typical 1.36 v. early warning the early warning function compares a voltage defined by the user to an internal reference voltage. therefore the supervised voltage has to be scaled down by an aed03107 thermal t d power-on-reset voltage dip secondary overload at output spike t v ld v ro, sat rt v t rr < rr t at input undervoltage shutdown v v ro d v t t t t q v v i v ud d d i c d d =
data sheet 16 rev. 1.1, 2004-01-01 tle 4299 external voltage divider in order to compare it to the internal sense threshold of typical 1.35 v. the sense output pin is set low, when the voltage at si falls below this threshold. a typical example where the circuit can be used is to supervise the input voltage v i to give the microcontroller a prewarning of low battery condition. calculation to the voltage divider can be easily done since the sense input current can be neglected. figure 9 sense timing diagram v thhl = ( r si1 + r si2 )/ r si2 v si low (4) v thlh = ( r si1 + r si2 )/ r si2 v si high (5) the sense in comparator uses a hysteresis of typical 100 mv. this hysteresis of the supervised threshold is multiplied by the resistor dividers amplification ( r si1 + r si2 )/ r si1 . the sense in comparator can also be used for receiving data with a threshold of typical 1.35 v and a hysteresis of 100 mv. of course also the data signal can be scaled down with a resistive divider as shown above. with a typical delay time of 2.4 s for positive transitions and 1.7 s for negative transitions receiving data of up to 100 kbaud are possible. aed02559 t sense t si, high v si, low v input voltage high low output sense t pd so lh pd so hl t
data sheet 17 rev. 1.1, 2004-01-01 tle 4299 the sense output is an open collector output with a pull-up resistor of typical 20 k ? to q. an external pull-up can be added with a resistor value of at least 5.6 k ? . typical performance characteristics output voltage v q versus temperature t j output voltage v q versus input voltage v i aed01671 -40 v q v 04080 120 c 160 4.6 4.7 4.8 4.9 5.0 5.1 v = 13.5 v 5.2 j t aed01808 0 v q v 246 8 v10 0 2 4 6 8 10 12 v r l =50 ?
data sheet 18 rev. 1.1, 2004-01-01 tle 4299 charge current i ch versus temperature t j switching voltage v dt and v st versus temperature t j drop voltage v dr versus output current i q reset adjust switching threshold v radjth versus temperature t j 0 -40 j t d i ? aed03108 0 40 80 120 160 2 4 6 8 10 12 ?c i v = 13.5 v = 1 v v d aed01804 -40 v 04080 120 c 160 0 v = 13.5 v 0.4 0.8 1.2 1.6 2.0 2.4 2.8 3.2 v v ld ud v d j t 0 0 q i aed02929 dr v 50 100 150 200 50 100 150 200 250 300 mv 400 ma 25 ? c 125 ? c 0.9 -40 j t aed03109 1.0 1.1 1.2 1.3 1.4 1.5 40 0 80 160 120 ? c v radjth v
data sheet 19 rev. 1.1, 2004-01-01 tle 4299 sense threshold v si versus temperature t j current consumption i q versus output current i q output current limit i q versus input voltage v i current consumption i q versus output current i q 1.0 -40 j t aed02933 1.1 1.2 1.3 1.4 1.5 1.6 40 0 80 160 120 ? c v si v sense output high sense output low 0 0 q i aed02931 ma q i 0.2 0.4 0.6 0.8 1.0 10 20 30 40 60 ma aed03110 0 q ma 10 20 30 40 v50 0 =25c v 50 100 150 200 250 300 350 c 125 = j t j t 0 0 q i aed02932 50 100 150 200 ma ma q i 1 2 3 4 5
data sheet 20 rev. 1.1, 2004-01-01 tle 4299 package outlines figure 10 p-dso-8-3 (plastic dual small outline) does not include plastic or metal protrusion of 0.15 max. per side -0.05 -0.2 +0.1 5 0.41 index marking (chamfer) x8 1 1) 4 8 1.27 5 a 0.1 0.2 m a (1.5) 0.1 min. 1.75 max. c c 6 0.2 0.64 0.33 4 -0.2 -0.0 1 0.2 +0.05 x 45 ? 0.08 1) 0.25 max. 8 ? 1) index marking gps09032 you can find all of our packages, sorts of packing and others in our infineon internet page products : http://www.infineon.com/products . dimensions in mm smd = surface mounted device
tle 4299 data sheet 21 rev. 1.1, 2004-01-01 figure 11 p-dso-14-8 (plastic dual small outline) 0.08 0.2 does not include plastic or metal protrusion of 0.15 max. per side index marking -0.06 1.27 +0.1 0.41 c 0.1 -0.2 8.75 1 14 7 1) a m 0.2 8 a 0.1 min. (1.5) c 14x 6 1.75 max. 4 1) -0.2 0.33 0.25 0.64 0.2 +0.05 -0.01 x 45 ? max. 8 ? 1) gps09033 you can find all of our packages, sorts of packing and others in our infineon internet page products : http://www.infineon.com/products . dimensions in mm smd = surface mounted device
edition 2004-01-01 published by infineon technologies ag, st.-martin-strasse 53, 81669 mnchen, germany ? infineon technologies ag 2004. all rights reserved. attention please! the information herein is given to describe certain components and shall not be considered as a guarantee of characteristics. terms of delivery and rights to technical change reserved. we hereby disclaim any and all warranties, including but not limited to warranties of non-infringement, regarding circuits, descriptions and charts stated herein. information for further information on technology, delivery terms and conditions and prices please contact your nearest infineon technologies office ( www.infineon.com ). warnings due to technical requirements components may contain dangerous substances. for information on the types in question please contact your nearest infineon technologies office. infineon technologies components may only be used in life-support devices or systems with the express written approval of infineon technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system, or to affect the safety or effectiveness of that device or system. life support devices or systems are intended to be implanted in the human body, or to support and/or maintain and sustain and/or protect human life. if they fail, it is reasonable to assume that the health of the user or other persons may be endangered.

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